Vague VHDL
By ru551n
VHDL for VS Code: formatting and static analysis from the speja language server, plus syntax highlighting and editing actions such as instantiating an entity, declaring port map signals and generating a state machine.
VHDL for VS Code: formatting and static analysis from the speja language server, plus syntax highlighting and editing actions such as instantiating an entity, declaring port map signals and generating a state machine.